The present invention relates to a modulator-demodulator (i.e., MODEM) and, more particularly, to a simple, economical modulator-demodulator apparatus and system.
A MODEM according to a first technique of the prior art has its operations controlled by writing data in a number of registers built therein, as disclosed in "R96FAX 9600BPS FACSIMILE MODEM" on pp. 7-7 to 7-19 of ROCKWELL 1985 DATA BOOK.
A MODEM is a device for transmitting digital data over analog lines such as telephone lines and is divided into various types of communications and modulations/demodulations, most of which are individually determined as the V-serial counsels under the international standards by the Consultative Committee, International Telegraph and Telephone (CCITT).
An actual apparatus frequently has a plurality of standards stored therein. A facsimile usually stores a plurality of facsimile standards such as G3 (one-minute standards), G2 (three-minutes standards) or G1 (six-minutes standards). Thus, especially the MODEM for facsimiles has to store accordingly plural standards. Moreover, the facsimile must have functions to transmit tone signals for transmission control procedures and to control the network for connections with common lines, and its operations must be simultaneous in plural modes. The MODEM stores those functions so that its functions necessary for facsimile transmission are diversified. This makes it necessary to use a number of commands for controlling the operations of such MODEM. The aforementioned MODEM is interfaced with an external device through a Dual Port RAM, as described on pp. 91.
In the case of transmissions, for example (1) discriminate the send or receive; (2) designate the operation standards and rates; (3) turn ON the send demand; (4) detect the ON state of the sending indication from the MODEM; and (5) send data to the MODEM. In the case of ending the transmissions, (6) turn OFF the send demand. In the case of receptions, on the other hand: (1) discriminate the send or receive; (2) designate the operation standards and rates; (3) control the automatic gain control; (4) know whether or not the receive signal has been received in view of the carrier detection display; (5) monitor the signal quality; and (6) receive the data. The end of receive occurs when the carrier detection display is turned OFF. Sixteen control register bits are used.
The large-scale integration of the MODEM is disclosed as a second technique of the prior art on pp. 51 to 55 of Japanese Magazine "Electronics", October, 1984. As the MODEM is required to have higher performances and more efficient performances, scale reduction, i.e., large-scale integration is indispensable. In order to utilize the digital signal processing technique which has its using technique developed especially in recent years, a digital signal processor (i.e., DSP) is used in a high-speed MODEM having a transmission rate of 4,800 bps or 9,600 bps. In this DSP, there are built a RAM for temporarily storing data, a data ROM for saving constants necessary for arithmetic operations, a high-speed parallel multiplier, an adder/subtractor, and arithmetic logic unit (i.e., ALU), an input/output function (i.e., I/O port), and an instruction ROM for writing in signal processing procedures. In order to execute the arithmetic operations highly efficiently, the DSP is usually equipped with two data bus lines and RAMs. Other devices for effecting the high performance and high-speed arithmetic operations are address pointers, interrupt controls, automatic instruction repeating functions and so on.
For modulations and demodulations with digital signal processings, on the other hand, an analog circuit is required as an interface with lines. This interface uses an analog front-end LSI. This analog front-end LSI is composed mainly of A/D and D/A converters and may be further composed of an attenuator (i.e., ATT) for setting a transmission level, an automatic gain control for covering the change in the input level, a cable equalizer for equalizing the frequency characteristics of subscriber's lines, a delay equalizer for equalizing the group delay strain of a carrier link, a carrier detector, a zero-cross detector and so on.
In case such LSI is fabricated, the same digital IC process as that of a microprocessor is used for the DSP, and an analog process is used like the A/D converter or the like for the analog front-end LSI.
In a low-speed MODEM having a transmission rate of 1,200 bps, an FSK or PSK modulation method is used, which is realized by a one-chip MODEM having its digital and analog portions integrated in one chip, because it can be realized by a simple circuit structure and because it is little influenced by circuit strain and needs no automatic equalizer. A third example of the prior art is disclosed in "A Single-Chip Frequency-Shift Keyed Modem Implemented Using Digital Signal Processing" on pp. 869 to 977 of Journal of Solid State Circuit of IEEE Vol. SC-19, No. 6 (in December, 1984). This MODEM is a low-speed type having an FSK modulation system only but shows one trend for the large-scale integration. All the necessary functions for the modulations, demodulations and filters are realized by the digital signal processing to two DSPs integrated into one chip with the A/D converters. That MODEM further stores the serial interface and loop back test functions, which are determined by the RS232 C or V.24 standards. The two DSPs have data RAMs, coefficient ROMs and instruction ROMs, respectively, so that they operate independently of each other. On the other hand, the A/D and D/A converters select a high sampling rate based upon the sampling law of Nyquist. In order to eliminate the folded noises due to the sampling, however, a far higher sampling rate is selected. On the other hand, an extra sigma-delta type is used as the A/D converter so that digital circuits such as decimeters or interpolators are used together by reducing the pure analog circuits to produce the A/D converted signals at necessary sampling rates. Thus, the third example is featured as having little dispersion of characteristics and is stable as a semiconductor device even if those circuit elements are integrated into one chip around the digital circuit; its characteristics are reproducible even if it is mass-produced; and a number of operation modes and complicated functions can be realized by the software control without any substantial increase in the chip size.
A fourth technique of the prior art known as a MODEM to be connected with a transmission terminal equipment (i.e., DTE) is disclosed in "CMOSLSI for MODEM of 1,200 Bits/Sec Having Built-in Interface with Microprocessor or Telephone Lines", on pp. 227 to 237 of "Nikkei Electronics", Aug. 25, 1986.
The MODEM according to the fourth technique of the prior art will be described in the following with reference to the accompanying drawings.
FIG. 1 is a block diagram showing the structure of a MODEM according to the fourth technique of the prior art, and FIG. 2 is a block diagram showing the usage of the MODEM according to the fourth technique of the prior art. In FIGS. 1 and 2: reference numeral 601 designates the MODEM; numeral 602 control means; numeral 603 modulating means; numeral 604 demodulating means; numeral 610 a DTE; numeral 611 a microcomputer (which will be shortly referred to as "MPU"); numeral 612 a serial interface (which will be shortly referred to as "S-I/F").
The MODEM 601 according to the prior art is constructed, as shown in FIG. 1, the control means 602, including the modulating means 603 and the demodulating means 604 and is equipped with a microcomputer bus interface (which will be shortly referred to as "MPU-I/F"), a serial interface (which will be shortly referred to as "V.24-I/F") and an analog interface (which will be shortly referred to as "A-I/F") such that it can transfer parallel and serial data. FIG. 2 shows the entire structure in case the MODEM thus constructed is used in connection with the DTE 610. Specifically, the DTE 610 is constructed of the MPU 611 and the S-I/F 612 and is connected with the MODEM 601 through the MPU-I/F and the V.24-I/F.
In case, with this structure, data is to be transferred in series between the DTE 610 and the MODEM 601, the MPU 611 gives the operating conditions such as the transmission rate or the training type to the MODEM 601 through the MPU-I/F, prior to the start of the operations of the MODEM 601, to accomplish the actual data transfer in series through the V.24-I/F.
In case, on the other hand, the data are to be transferred in parallel between the DTE 610 and the MODEM 601, not the V.24 I/F but the interrupt function (i.e., the INT terminal in FIG. 1) of the MPU-I/F is used to effect synchronization so that the MPU 611 accomplishes the data transfer in parallel according to its software. Incidentally, the A-I/F of the MODEM 601 is an interface with the communication lines.
The aforementioned first technique of the prior art is provided with numerous hardware registers for controlling the operations of, the MODEM functions, but it takes no consideration of the MODEM control for controlling the operations in response to a software command by minimizing the number of these registers. In case the various MODEMs are to be realized by a generalized hardware as is different from the case in which the MODEM is specialized for the facsimiles as in the prior art, it is naturally necessary to prepare the registers in a number equal to that of the MODEMs having the maximum functions if the MODEMs are to be controlled in response to a command by the hardware registers. A certain MODEM for facsimiles is equipped with a register having 32 bytes and 192 bits. This requires about 7,000 transistors if it is realized by CMOS circuits, for example.
In recent years, a MODEM of medium- and low-speeds is realized by a one-chip LSI. In case, however, the aforementioned multi-function high-speed MODEM of the prior art is to be constructed of a one-chip LSI, this integration is not economical because of the aforementioned large number of transistors.
In case the functions are to be extended, on the other hand, the control by the hardware registers would make it necessary to add the registers, thus limiting the extension.
According to the control method by the hardware registers, more specifically, the operations of any control bits are logically free and have no limit to the order, because the control bits are independent. However, the MODEM functions require the aforementioned procedures, and numerous registers have to be handled so as to follow these procedures for the operations. This provides problems for the register referring procedures following the operating procedures.
Moreover, the operations and control functions of the MODEM are too complicated to understand.
The aforementioned second and third techniques described above are accompanied by the following defects.
Even the high-speed MODEM of the most developed type according to the prior art is a multi-chip device using a plurality of DSPs and analog front-end LSIs so that it has a large number of parts and is limited in its size reduction. This raises a defect that the system becomes expensive.
Moreover, the high-speed MODEM of the prior art has its analog front-end LSI occupying a high rate of the entire structure of a pure analog circuit. This raises a defect that the product characteristics are highly dispersed. This makes it necessary to use the laser trimming technique or the like so that the LSI itself is defectively reluctant to become inexpensive.
Moreover, since the high-speed MODEM of the prior art is constructed of a multi-processor and cannot avoid mutual association, it has to consume spare processing time and use twice the hardware. Thus, the high-speed MODEM is accompanied by a defect that it deteriorates the operating efficiency of the resources.
Moreover, the high-speed MODEM of the prior art divides its internal software processing into sample processing and baud processing. Since the basic timing is controlled by the baud processing, the high-speed MODEM requires a baud rate timer in addition to the sampling timer and the bit-rate timer so that it is accompanied by a disadvantage of requiring a large amount of hardware.
Moreover, the aforementioned sampling process is the modulating and demodulating functions of a filter required to have synchronism with the timing of the A/D and D/A conversions, and the baud processing is a signal point assigning process, an automatic equalizing process, a differential coding, and scrambler which have to be processed in synchronism with the timing of the generation or judgement of a signal point to be modulated. For processings with the timings of those two kinds, the two DSPs to be used are specialized for the sampling and baud processings. Alternatively, a microcomputer has to be provided as a third processor for arranging the timing. A defect is that the setting of the processing timing is complicated.
On the other hand, the single chip seems to have been able to be realized because of the technically simple transmission system called the low-speed MODEM. The application of the single chip to a high-speed MODEM has the following problems.
The DSP has an arithmetic executing performance ten to one hundred times as high as the ordinary general-purpose microprocessor. In the example of the prior art, the low-speed MODEM of 300 bps is processed by the two built-in DSPs. If this is applied as it is to a high-speed MODEM, there arise problems of a low arithmetic performance, a low program capacity, a small number of bits for A/D and D/A conversions, the non-linear characteristics of the A/D conversions, and no reproduction of the timing signals from the received signals. Thus, the single chip cannot be applied to the high-speed MODEM.
Moreover, the single-chip MODEM of the prior art is realized by the signal processing of the DSP including an interpolator or a decimeter, for example, by drastically processing the A/D conversions or the D/A conversions into digital signals. In order to attain the conversion characteristics equivalent to those of the analog signal processing of the prior art, however, an arithmetic accuracy far higher than that for the modulations or demodulations is required for the arithmetic processings of the A/D or D/A converters. Thus, another defect is that the DSP has to bear a heavy burden.
Incidentally, the DSP used in the high-speed MODEM of the prior art and the analog front-end LSI cannot be integrated into one chip in the circuit structure of the prior art because of different fabrication processes. Specifically, the DSP is constructed of a digital circuit so that a plurality of DSPs of high performance can be integrated into one chip because the degree of integration rises to the higher level as the semiconductor fabrication step (or process) becomes finer. On the contrary, the analog front-end LSI of the prior art uses a switched capacitor filter technique, in which the area for capacitors necessary for realizing the required capacity on the semiconductor surface is not dependent upon the semiconductor process but is constant so that the wiring rule is several times as large as that of the digital circuit. Thus, another defect is that a desired size reduction cannot be achieved. Moreover, this switched capacitor system is liable to be influenced by noise because its characteristics are realized by charge transfer and storage. A problem is that normal operations cannot be accomplished due to the noise which is generated by the digital circuit of the one-chip DSP. Thus, the application of the high-speed MODEM requiring a high S/N ratio is difficult in connection with the analog portion.
The aforementioned, fourth technique of the prior art has a low operating efficiency of terminals because the interrupt terminals for parallel data transfer are not used during the serial transfer of the data whereas the terminals for serial data transfer are not used during the parallel data transfer. In case the MODEM shown in FIG. 1 is formed as a one-chip semiconductor device, the chip is an IC chip having a large number of terminals, or a large-sized package having a large number of terminals has to be used. Thus, the fourth technique of the prior art has a problem that, it is not economical. Since the software processing by the MPU is used for the parallel data transfer, moreover, the technique of the prior art has another problem that the processing throughput to the terminals of the DTE will drop in case the speed of the MODEM is high.